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Tuyển dụng Technical Product Management, Principal Engineer (m/f/d)

11.7–21.7 triệuCòn khoảng 30 ngàyỨng tuyển ngay →

Mô tả công việc

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You have spent years deep in analog and mixed-signal design, close enough to the schematic, the simulation deck, and the layout to know exactly where designers lose hours to manual work that should not exist anymore. You understand the difference between a tool that demos well and one that actually fits into a Tuesday afternoon when someone is racing toward tapeout. You have probably been that designer, or sat close enough to them to know what breaks their flow.

Now you are drawn to the product side because you see the gap between what EDA tools could do and what they actually deliver. You think in workflows, not features. When someone mentions agentic AI or LLM-driven automation, you do not get starry-eyed, you immediately ask what task it would replace, how it would fail, and whether a designer would trust it. You know where AI can help and where it will just get in the way.

You are technical enough to argue about parasitic extraction with an engineer and strategic enough to walk into a customer meeting and leave with a roadmap that actually reflects what they need. You do not wait for perfect clarity, you prototype, you test with real users, and you iterate.

What You'll Be Doing

Define product vision, strategy, and roadmap for analog and mixed-signal design automation tools that directly address productivity bottlenecks in schematic capture, SPICE simulation, layout, physical verification, and parasitic extraction

Work directly with analog designers and layout engineers to map their workflows, identify where time is lost, and translate those pain points into product requirements and prioritized feature sets

Drive the application of agentic AI and LLM-based automation to EDA workflows, determining where AI agents can safely automate tasks like corner analysis setup, simulation scripting, or DRC/LVS triage without introducing risk

Collaborate with engineering, AI/ML, and software teams to build prototypes, validate concepts with real design data, and iterate based on designer feedback and measurable outcomes

Translate complex analog design and verification workflows into clear technical specifications, user stories, and success metrics that engineering teams can build against

Engage with customers and internal design teams throughout the product lifecycle to validate direction, gather feedback, and ensure adoption of new capabilities

Track product performance through metrics like designer time saved, simulation turnaround time, layout closure speed, and tool adoption rates across customer and internal teams

The Impact You Will Have

You will shape the next generation of analog and mixed-signal design automation tools used by semiconductor companies building everything from power management ICs to high-speed data converters

Your work will directly reduce design cycle time for analog engineers, turning workflows that took days into workflows that take hours through smarter automation and AI-assisted decision-making

You will help define how AI agents integrate into EDA, setting the standard for what safe, effective, and trustworthy AI-driven design automation looks like in production environments

The products you define will influence how thousands of analog designers interact with simulation, layout, and verification tools every day across the industry

You will bridge the gap between cutting-edge AI research and practical EDA application, ensuring that new technologies solve real problems rather than create new ones

Your roadmap decisions will directly impact Synopsys product differentiation in the analog and mixed-signal EDA market

You will help analog design teams adopt new methodologies and tools that improve quality, reduce respins, and accelerate time to tapeout

What You'll Need

MS in Electrical or Computer Engineering with 10+ years of experience in semiconductor design, EDA development, analog/mixed-signal IC design, or design automation roles

Strong hands-on proficiency with analog and mixed-signal design methodologies, including schematic capture, SPICE-based simulation, corner analysis, Monte Carlo, transient/AC/DC/noise analysis, and post-layout simulation

Deep understanding of analog layout, physical verification workflows including DRC/LVS, parasitic extraction, and how extracted parasitics affect circuit performance and simulation accuracy

Experience translating design workflows into product requirements, prototypes, or automation solutions, whether as a designer building internal tools, an applications engineer supporting customers, or a product manager defining features

Familiarity with AI and ML techniques applied to EDA, particularly LLM-based systems, agentic AI, tool calling, workflow orchestration, and how autonomous or semi-autonomous agents can augment engineering tasks

Prior experience as an analog or mixed-signal designer, EDA engineer, applications engineer, or technical product manager is strongly preferred

Experience with major EDA platforms and analog design environments such as Cadence Virtuoso, Synopsys Custom Compiler, or similar tools is a plus

Who You Are

You can sit in a room with analog designers talking about a simulation setup that is taking too long and walk out with a clear product hypothesis about what to automate and what to leave alone

You push back when a feature request is too vague or when an AI-driven workflow idea sounds clever but would not survive contact with a real design schedule

You are comfortable building rough prototypes or working with engineering to validate an idea quickly, even if it means using duct tape and Python scripts before committing to a full product build

You think about trust and safety when it comes to AI in EDA, you know that designers will not adopt automation that produces results they cannot verify or understand

You are organized enough to manage a roadmap with multiple stakeholders, shifting priorities, and dependencies across engineering, AI research, and customer timelines without losing sight of what matters most

You can explain a complex tradeoff between simulation accuracy and runtime to a VP in two sentences without losing the nuance, and you can turn around and write a technical spec that an engineer can build from

The Team You'll Be Part Of

Your recruiter will share more about the team structure and mission during the interview process.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Việc này hợp với ai đó bạn quen?

Nhà tuyển dụng Synopsys Vietnam

Synopsys Vietnam

Trụ sở chính: 364 đường Cộng Hòa, Phường Tân Bình, TP Hồ Chí Minh Chỉ đườngMã số thuế: 0302080763

Tuyển dụng trực tiếp từ Synopsys Vietnam (careers.synopsys.com).

4việc đang tuyển
4việc mới / 30 ngày
1nguồn tuyển dụng
Kỹ năng tuyển nhiều:R&DỨng dụng AIĐiện - Điện tửGiao tiếpCơ khíTự động hóaLLM / RAGKết cấu
Vị trí tuyển nhiều:Professional Services Consulting, Staff Consultant · 1Project Engineering Management, Principal Engineer · 1Technical Product Management, Principal Engineer · 1Workplace Resources, Sr Staff · 1
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Tin không ghi mức lương cụ thể. Khoảng tham khảo theo mặt bằng ngành là 11.7–21.7 triệu.
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